RESUME of Laszlo Hars

Email

- Laszlo at Hars US

- LHars at cputech com

Summary

Since 1990 I have been leading and practicing Information Security research and product development. I have been the chief architect of the crypto functionality of the Seagate Self Encrypting Disk drives (SED) (encryption, access control, authentication, diagnostics…). I have 24+ granted patents in the field of Information Security, 48+ published patent applications (with over 20 more in the pipeline), 42 scientific publications, 4 more are under preparation.

With broad experiences in industrial research, university lecturing, product development and project management I am an expert in a wide variety of fields including Information Security – Cryptography, DRM, Digital Watermarking, Random number generation and testing; System architecture; SW/HW development; Large Scale and Algorithmic Optimizations; Digital Signal Processing; Electronic Design and Simulations; Computational Geometry. Besides research and university lecturing I designed integrated circuits, managed large software projects and did electronic and software system design. A lot of my work led to products still in the market. I have been responsible for project schedule, risk management; selecting, training and appraisal of team members, supervised Ph.D. students.

Skills

Information Security	Cryptography Architect security systems; Threat models; Design and optimize Elliptic Curve Cryptosystems; RSA, DES, AES implementations; Cryptographic Toolboxes; long arithmetic algorithms; protocols, encryption modes, ciphers; Analyze security and functionality of cryptosystems Tamper Resistant SW improve known techniques, invent new ones True Random Number Generators design several new ones, improve old Random Number Tests design new tests, analyze and improve old ones Copyright Management, Copy Protection invent, analyze and program new methods Digital Watermarking new methods (for audio, image, document), apply signal processing for their test and evaluation; investigate attack scenarios
Electrical Engineering R & D	Signal Quality Measurement Design and build instruments for spread spectrum telecommunication systems (CDMA, GSM, DECT, NADC) Signal Generation Design and build instruments for very low distortion, wide-band modulated signals Electronic Systems modeling Mathematical analysis and system simulations (noise effects, distortion, phase jitter, frequency drift, quantization errors, rounding errors, ADC resolution…) Circuits Design New algorithms for analog and digital filter design and implementation; randomness source, data recorder, demodulator, power supply and other circuit designs Spectrum Analyzers Designs and constructions (sweeping- and FFT-based) Digital Oscilloscopes Design and construction; New Calibration Methods
Software Development	Mathematical SW Design and program Graph creating and manipulating packages, equations Editor, new methods for Planar Drawing of graphs, rotate-add-XOR ciphers, Simultaneous Rational Approximations, Truncated arithmetic Parallelization of network-, sorting- and matrix-algorithms Compiler design and Language definition for a list manipulation language Medical Systems Modeling, SW design: dosage of antibiotic treatment, model of concentration of chemicals and decomposition products in the blood; Dialysis Planning at severe kidney insufficiency Router New algorithms and SW for VLSI design, multi-chip modules Control SW and algorithms for plotters, printers Utilities Electronic Musical Instruments, controller for the disabled Statistical Estimation and Evaluation of measurement errors Combinatorial Games new algorithms and programs
University Lecturing	Undergraduate courses: Geometry, Calculus, Combinatory, Combinatorial Games, Graph Theory, Computer programming Graduate courses: Differential Geometry, Non-Euclidean Geometries, Discrete Geometry, Algorithmic Theory, Combinatorial Algorithms, Numerical Methods, Computational Geometry, Parallel processes, Data Structures
Fundamental Research	Special Functions Crypto applications, invertibility; Fermat numbers Computational Geometry Solve open mathematical problems about optimal weighted circle placement on surfaces of constant curvature Computer Graphics Design, analyze fast second order curve drawings; data structures and algorithms for planar projections of 3D bodies Discrete Geometry Investigate optimal placements of objects on surfaces; Study Equivalence classes of polyhedra by dissection Complexity of Algorithms (geometric, numeric, combinatorial) Optimization, improvements of numerical and combinatorial algorithms Numerical Methods Reciprocal, inverse square root, polynomial roots, zeros of smooth functions, special functions, matrix calculations Discrete Orthogonal Transformations speed-ups, new algorithms Networks File allocation and traffic optimizations VLSI Design Placement-, wire routing algorithms
Professional Activities	Panelist, National Science Foundation review of Cyber Trust (ISG) proposals (2005) Member of IEEE P1619 (Security In Storage) standards committee (2004 - ) Organized, chaired the Philips Information Security Workshop (2001, Eindhoven) Coordinator of the Parallel Processing research group at the Eötvös University (1987−1989) Chairman of the organizing committee of the Hungarian National High-School Mathematical Contest (1984−1988)
Tools Mastered	Various analog and digital MEASUREMENT systems SW Applications: MATLAB, Maple, Wolfram Mathematica, MS Office, VISIO… Operating Systems: MS Windows, Virtuoso, pSOS, Unix/Linux Programming Languages: Assembler (TI DSP and x86), C/C++, Pascal, Fortran, REX, TeX, Occam, AHK, Python
Languages	Speak, read and write: English, German, Hungarian

Degrees, Education

Ph.D. in Computational Geometry, (Eötvös Loránd University, Budapest, 1977. Thesis: Circle Packing)

M.Sc. in Mathematics and Computer Science, (Eötvös Loránd University, Budapest 1975. Thesis: Complexity of Algorithms)

Work Experience

5/2011 – present	CPU Technology, Inc. 1500 Kansas Ave. Suite 3D Longmont, CO 80501	Chief Cryptologic Architect System design, Random Numbers, Information Security, Cryptography
9/2002 – 5/2011	Seagate Technology 389 Disc Drive Longmont, CO 80503	Principal Engineer-Scientist Manage R&D projects System design, Random Numbers, Information Security, Cryptography
2/2000 – 8/2002	Philips Research, USA 345 Scarborough Rd Briarcliff Manor, NY 10510	Senior Scientist Lead research projects Random Numbers, Information Security, DRM
7/1998 – 2/2000	Panasonic Technologies, Inc. Panasonic Information and Networking Technologies Laboratory, Princeton, NJ	Senior Scientist Lead research projects Digital Watermarking, Cryptography
1/1990 – 6/1998	Schlumberger Technologies → Wavetek Corp. Ismaning, Germany	Technology Manager, Mathematician: Mathematics and Simulations, Electronic Design, R&D Management
6/1988 – 1/1990	Institute for Operations Research University Bonn, Bonn, Germany	Visiting researcher VLSI design, Large Scale Optimizations
8/1985 – 9/1992	Dept. of Computer Science Eötvös Loránd University Budapest, Hungary	Scientist, Lecturer Computer Science, Discrete Mathematics
9/1979 – 9/1981	Dept. of Applied Mathematics and Physics Kyoto University, Kyoto, Japan	Visiting researcher Network optimizations
8/1975 – 8/1985	Dept. of Geometry Eötvös Loránd University Budapest, Hungary	Junior Scientist, Lecturer Discrete/Computational geometry

Publications

Papers, Conference Presentations

[1] 10-Circle-Packing on the Sphere, Conference on Univ. Mathematics, Eger, 1974

[2] In-Place Sorting (an efficient algorithm), Computer Science Conference, Szeged, 1974

[3] Novel Phase-Shifter Circuit, Radiotechnika, 1976

[4] Ph.D. Thesis: Weighted Circle Systems, 1977

[5] with A. Florian, J. Molnar: On the ρ-System of Circles. Acta Math. Acad. Sci. Hung. (1977) pp. 205-221.

[6] The Tammes Problem for n = 10. Studia Sci. Math. Hung. (1986) pp. 439-451.

[7] Problems in Computation Theory. Notes of the Technical University of Budapest. (1987)

[8] Circle Packing with Maximum Total Perimeter. Studia Sci. Math. Hung. 25 (1990) pp. 223-229.

[9] On the Density of Floating Balls. Studia Sci. Math. Hung. 27 (1992) pp. 25-35.

[10] Automatic Multi-Chip Module Wiring. Report No.90628-OR, Forschungsinstitut für Diskrete Mathematik, University Bonn.(1990) [pdf]

[11] Random Search in the Traveling Salesman Problem. Report No.90629-OR, Forschungsinstitut für Diskrete Mathematik, University Bonn. (1990) [pdf]

[12] Motion Control of Drawing Machines. Report, Institut für Ökonometrie und Operations Research, University Bonn. (1989) [pdf]

[13] Reversible-Segment List. Report, Institut für Ökonometrie und Operations Research, University Bonn. (1989) [pdf]

[14] Hybrid Heuristic for the Maximum Weighted Independent Set Problem. Report, Institut für Ökonometrie und Operations Research, University Bonn. (1989) [pdf]

[15] Iterative best fit design of IIR Filters. Proceedings of the Schlumberger Signal Processing Applications Conference (1993)

[16] Fast software division with Digital Signal Processors. Proceedings Schlumberger Signal Processing Applications Conference (1993)

[17] Formulae and Algorithms for the GMSK Modulation, DSP World Workshop Proceedings, Toronto (1998) pp. 221-238 [doc] [pdf]

[18] Fast Calculation of Common Mathematical Functions with Floating-Point DSPs, ICSPAT Conference Proceedings (1998), pp. 521-525.

[19] Optimum DFT Window Design, DSP World Spring Design Conference Proceedings, Santa Clara (1999). [doc]

[20] Frequency Comparator Based GFSK Demodulation, International Conference on Signal Processing and Applications and Technology, Conference Proceedings, Orlando (1999) [doc]

[21] Frequency Offset Measurement of GMSK/GFSK Modulated Signals, ICSPAT, Conference Proceedings Orlando (1999) [doc]

[22] Wide Range Frequency Response Compensation Using DSP, ICSPAT, Conference Proceedings, Orlando (1999) [doc]

[23] Algorithmic Optimization for Floating Point DSP Mathematic Libraries, DSP World, Conference Proceedings, Orlando (1999). [doc]

[24] How to Decimate with a DSP, DSP World, Conference Proceedings, Orlando (1999). [doc]

[25] DSP Supported Sweeping Spectrum Analysis, ICSPAT, Conference Proceedings, Dallas (2000). [doc] [ps]

[26] Generating Signals for Simulation and Test of Complex DSP Systems, ICSPAT, Conference Proceedings, Dallas (2000). [doc] [ps]

[27] Frequency Response Compensation with DSP, IEEE Signal Processing Magazine, (July 2003) pp. 91-95. [doc], also in: Streamlining Digital Signal Processing: A Tricks of the Trade Guidebook, Richard G. Lyons (Editor), ISBN: 978-0-470-13157-2, September 2007, Wiley-IEEE Press

[28] with M. Epstein, R. Krasinski, M. Rosner, H. Zheng: Design and Implementation of a True Random Number Generator Based on Digital Circuit Artifacts, Workshop on Cryptographic Hardware and Embedded Systems CHES 2003, Cologne, Germany (2003) [doc] [pdf]

[29] Fast Truncated Multiplication for Cryptographic Applications, (CHES 2005), Edinburgh, [doc] [pdf] [ppt]. Short presentation in the rump session of the 6th Workshop on Cryptographic Hardware and Embedded Systems (CHES 2004), Cambridge, MA, USA (August 2004): [ppt]

[30] Applications of Fast Truncated Multiplication in Cryptography,  EURASIP Journal on Embedded Systems, vol. 2007, Article ID 61721, 9 pages, 2007. doi:10.1155/2007/61721. The results were presented in CHES 2005, Edinburgh, but not printed in the proceedings [doc] [pdf]. Short presentation in the rump session of the 6th Workshop on Cryptographic Hardware and Embedded Systems (CHES 2004), Cambridge, MA, USA (August 2004): [ppt]. (The paper accepted for CHES'05 was rejected for CHES'06: [doc])

[31] Long Modular Multiplication for Cryptographic Applications, Presented in the 6th Workshop on Cryptographic Hardware and Embedded Systems (CHES 2004), Cambridge, MA, USA August 2004 [doc] [pdf] [ppt]. Cryptology ePrint archive: http://eprint.iacr.org/2004/198/, SpringerLink: [url]
Note: The publisher misprinted the first version of the paper in the conference proceedings LNCS 3156. It was later corrected and re-printed.

[32] Random Topics, Invited talk on SummerCon 2004, Pittsburgh [ppt]

[33] Modular Inverse Algorithms without Multiplications, EURASIP Journal on Embedded Systems, Volume 2006 (2006), Article ID 32192: [url], [pdf] (Manuscript 2004 [doc] [pdf]. Software for experiments [C], GMP-4.1.2 compiled into Win32 dll [zip].)

[34] with R. Thibadeau: DRM Building Blocks in Secure Disk Drives, Consumer Communications & Networking Conference, CCNC'05 / CES'05, Workshop on Digital Rights Management Impact on Consumer Communications, Las Vegas (January 6, 2005) [ppt] [pdf]

[35] with G. Petruska: Pseudorandom Recursions - Small and Fast Pseudorandom Number Generators for Embedded Applications. EURASIP Journal on Embedded Systems, vol. 2007, Article ID 98417, 13 pages, 2007. doi:10.1155/2007/98417.[url], [pdf]

[36] Discryption: Internal Hard-Disk Encryption for Secure Storage, Computer (IEEE Computer Society, ISSN 0018-9162) Vol. 40, Num 6. (June 2007), pp. 103-105. Latest version: [doc] [pdf]

[37] Toward Standardization of Self-Encrypting Storage: Invited talk in the Security in Storage Workshop, Baltimore, September 25, 2008 [doc] [pdf] [ppt].

[38] Random Number Generators in Secure Disk Drives. EURASIP Journal on Embedded Systems, vol. 2009, Article ID 598246, 10 pages, 2009. doi:10.1155/2009/598246. [url]

[39] with others: IEEE P1619 SISWG, Standard for Narrow-Block Encryption [url]

[40] with others: IEEE P1619 SISWG, Standard for Authenticated Encryption [url]

[41] with others: IEEE P1619 SISWG, Standard for Wide-Block Encryption [url]

[42] with others: IEEE P1619 SISWG, Standard for Key Management [url]

[43] with G. Petruska: Pseudorandom Recursions II. Accepted for publication in EURASIP JES. [doc] [pdf]

[44] Random Number Generation Based on Oscillatory Metastability in Ring Circuits. [doc] [pdf]

Issued Patents (24+ on the USPTO website)

Published patent applications (48+ on the USPTO website)

(~ 20 more patent applications are in the pipeline)